Integrated circuits are typically designed using circuit elements, such as transistors, resistors, capacitors, etc., from multiple voltage domains. As such, a circuit designer must be conscientious of inserting circuit elements into a schematic design to ensure that a low voltage terminal of a circuit element is not connected to a net that includes a terminal from another circuit element producing an excessive voltage which may damage the circuit element with low voltage terminal.
Current design procedures require the circuit designer to place a circuit element on a schematic design and, in a separate action, assign voltage markers with corresponding voltages to the circuit element's terminals. The schematic design tool treats the voltage markers as separate objects from the circuit elements and must be managed by the circuit designer during the schematic design phase and layout phase to ensure that the voltage markers remain assigned to their respective circuit element terminals.
At times, the circuit designer may assign an incompatible voltage value to a circuit element's terminal. At other times, the schematic design tool or layout design tool may disassociate a voltage marker from its corresponding circuit element terminal. If a circuit designer or layout designer does not detect these issues prior to device fabrication, an integrated circuit may be fabricated that has inherently dangerous bias conditions. In turn, the integrated circuit fails qualification testing and requires an expensive and time-consuming circuit re-design effort.